Discrete component backward traceability and semiconductor device forward traceability

ABSTRACT

A system is disclosed for providing backward and forward traceability by a methodology which identifies discrete components (die, substrate and/or passives) that are included in a semiconductor device. The present technology further includes a system for generating a unique identifier and marking a semiconductor device with the unique identifier enabling the semiconductor device, and the discrete components within that device, to be tracked and traced through each process and test in the production of the semiconductor device.

BACKGROUND OF THE INVENTION

1. Field

The present technology relates to fabrication of semiconductor devices.

2. Description of Related Art

The strong growth in demand for portable consumer electronics is drivingthe need for high-capacity storage devices. Non-volatile semiconductormemory devices, such as flash memory storage cards, are becoming widelyused to meet the ever-growing demands on digital information storage andexchange. Their portability, versatility and rugged design, along withtheir high reliability and large capacity, have made such memory devicesideal for use in a wide variety of electronic devices, including forexample digital cameras, digital music players, video game consoles,PDAs and cellular telephones.

Prior art FIGS. 1 and 2 respectively show a flowchart and schematicrepresentation of steps in the production of semiconductor device memorycards. Given the large number of components which are assembled into amemory card, and the tremendous scale on which memory cards are producedwithin a semiconductor fabrication plant, it is important to provide amethodology for tracking semiconductor devices as they progress throughthe memory card production process. Manufacturing execution systems(MES) are known which receive information in real time from processtools and fab personnel to manage and, to an extent, track theproduction of memory cards. An MES maintains a database of thefabrication process which allows fab personnel to track semiconductordevices during the production process and also may be used to trace thesource of problems should a defect be found in one or more assembledsemiconductor devices. One example of a known MES platform is that fromCamstar Inc., Charlotte, N.C., USA. Camstar Inc. provides an MESplatform under the name Camstar Manufacturing, and a quality managementsystem under the name Camstar Quality. Other known platforms formanaging the flow in a semiconductor memory card plant include Tangoproduction monitoring suite by CyberDaemons Inc. of Hsinchu, Taiwan andan assembly line production (ALPS) manager by Kinesys Software Inc.,Forest Grove, Pa., USA.

Referring to prior art FIGS. 1 and 2, memory die wafer lots 70 andcontroller die lot 72 are received in a memory card fabrication plantfrom wafer piece manufacturers. The wafers arrive with the integratedcircuits defined thereon by the wafer piece manufacturers so that eachmemory die wafer piece includes a plurality of memory die, and eachcontroller die wafer piece includes a plurality of controller die. Inthe embodiment shown in FIG. 2, a semiconductor device is beingfabricated including a pair of memory die. Thus, two memory die waferlots 70 a and 70 b are shown. It is also known to form semiconductordevices with one or more than two memory die. The wafer lot 70 a usedfor the bottom memory die may be referred to as the wafer mother lot,while wafer lot(s) used for memory die above the bottom die may bereferred to as the wafer sublots. Substrate lots 74 are also received inthe memory card fabrication plant from a substrate manufacturer. Thesubstrates in a substrate lot 74 may for example be a printed circuitboard (PCB), leadframe or tape automated bonding (TAB) tape.

In order to prepare the wafer pieces in the wafer lots 70, 72 foraffixation to a substrate in substrate lot 74, each wafer piece may havea protective tape applied to its active surface (the surface includingthe integrated circuits) and is then mounted to a chuck (not shown),active side down in step 20. Thereafter, a backgrind step 22 may beperformed on the each wafer piece to thin the wafer down to a desiredthickness. After backgrind step 22, the wafer pieces may be transferredto another tool where they are diced, for example by saw or laser, instep 24 so that they may be picked and placed onto the substrate.

In parallel with the die preparation steps, passive components may bemounted on the substrate in a surface mounting process. The solder pastemay be applied in step 30. The passive components, also referred toherein as passives, may be mounted in step 32, and the solder mayreflowed/cleaned in a step 34. The passives may include for exampleresistors and capacitors.

In step 42, the memory die and a controller die may be mounted on asubstrate at a die attach tool 76. The tool 76 makes use of a known gooddie (KGD) map 78 which defines good and bad die for each wafer pieceused. In particular, each die on each wafer piece in wafer lots 70, 72may be operationally tested and given a rating such as 0,0 (flawless),A,A (good) or 1,1 (bad). The KGD map 78 is used by the die attach toolso that bad die on a wafer piece are ignored. In step 42, memory die andtypically a controller die are mounted on a substrate to form asemiconductor device. As used herein, the term “device” refers to anassembly of a substrate, one or more semiconductor die on the substrateand, possibly, passive components on the substrate. The respective die,substrate and/or passives within a device may be referred to herein as“discrete components” of the semiconductor device.

Following the mounting of the die and passives on a substrate, theresulting device may then be wire bonded in step 48. The wire bondingstep 48 is a time consuming process. As such, the device assembly lotsmay be split into a plurality of device assembly sublots so that wirebonding may be performed by a plurality of wire bonding tools 80simultaneously (the number of wire bonding tools in FIG. 2 is by way ofexample only). In the wire bonding step 48, die bond pads on each of thedie mounted to a substrate may be electrically coupled to contact padson the substrate.

Following the wire bond step 48, the devices in the respective deviceassembly sublots may be encapsulated in a molding compound (step 50) inone or more tools 82, laser marked with an identifier (step 54) in oneor more tools 84, and then singulated (step 56) in one or more tools 86.FIG. 2 shows the device assembly sublots remaining separated througheach of these steps. However, one or more of the device assembly sublotsmay be reassembled into the device assembly lot following any of thesteps 48 through 56.

The laser marking step 54 may be significant in that it allowsinformation regarding a device assembly lot or sublot to be uploaded andtracked by the MES platform managing flow within the card fabricationplant. Prior art FIG. 3 shows an example of a conventional laser markplaced on the devices in a device assembly lot or sublot. The laser markmay include for example a logo and alphanumeric characters. Thealphanumeric characters may include a plant code identifying the plantwhere the semiconductor device was made, a date code indicating when thesemiconductor device was made, an MES lot or sublot number assigned toeach device assembly lot or sublot, and a device ID code identifying thetype of semiconductor package the device is. The information from thelaser mark for a device assembly lot or sublot is assigned and stored bythe MES, and used for device tracking and traceability.

Traditional MES platforms using this methodology have severallimitations. First, the MES platform does not uniquely identify specificdevices. At most, the MES assembly sublot number is unique to an entiredevice assembly sublot that went through a particular set of tools. Eachparticular device in such an MES assembly sublot will have the sameidentification code on its surface and be identified by the sameidentification code stored in the MES platform. Second, in part becauseof the generic marking of entire assembly sublots, there is no specificdiscrete component information directly associated with a specificdevice. That is, there is no direct link between a device'sidentification code and the semiconductor die, substrate and/or passivecomponents used in that device.

As one consequence, when a problem with a device is detected during orafter fabrication, conventional systems have limited ability find thesource of the problem. When a problem with a device occurs, prior artsystems may allow identification of an MES assembly sublot from whichthe problem device came. From the knowledge of the MES assembly sublot,it may be possible to determine what processes the problem device wentthrough. From this, further research could reveal a specific wafer lot,and possibly reveal where a problem occurred. However, such research istime consuming and does not provide any specific identification orinformation on the discrete components from which the semiconductordevice was formed.

Referring again to the flowchart and schematic representation of FIGS. 1and 2, after singulation, semiconductor devices 90 may be inspected(step 60) and then put through one or more tests in step 62. These testsmay include for example burn-in and memory read-write testing at highand low temperatures. Typically, semiconductor devices 90 from a numberof device assembly lots are combined in the testing step. It is known toperform tests on 30,000 to 50,000 devices 90 from a plurality of deviceassembly lots. There is an N:1 consolidation of device assembly lotsinto a single device test lot, where N may for example be 25 deviceassembly lots.

The devices from respective assembly lots are reshuffled into differentbins, depending on how the devices performed in the testing operations.In one example, it is known to divide the devices into seven bins (1-7),where devices classified in bins 1-4 have satisfactorily passed thetesting operations and are passed on to a card test, described below.Devices classified in bins 5-7 failed the testing operation for onereason or another, and are subjected to a reclaim step 64 where they areretested. The reclaim operations will vary depending on whether a devicewas classified in bin 5, bin 6 or bin 7. A device may go throughmultiple reclaim processes. If, after one or more of these reclaimprocesses, a device is found to operate satisfactorily, it may bereclassified into one of bins 1-4 and passed on to the card test.

The card test in step 66 may be similar to the memory test in step 62,however content may be written to each device and its capabilitiestested. Although not shown in FIG. 2, the card test may have a similarbinning operation, where devices classified in certain bins aresubmitted for retest in a reclaim operation in step 68. Devices 90 whichpass the card test may undergo some final inspection and processingsteps (not shown) and then shipped.

In some semiconductor memory card fabrication plants, the assembly stepsof attaching die to a substrate through to singulating the devices arereferred to as a 54-81 process. The memory test is referred to as a54-62 process. And the card test is referred to as a 54-99 process.Given the consolidation and shuffling of devices 90 from a variety ofassembly lots in 54-81 to the test lots in 54-62, and then thesubsequent reshuffling of devices in card lots in 54-99, it is difficultand time consuming, if it is possible at all, to trace devices which areidentified as problematic in the memory or card test phase using aconventional MES. This is in part due to the fact that memory devicesare not marked with unique IDs, and thus, there is no record of how aspecific semiconductor device performed in the testing operations.

DESCRIPTION OF THE DRAWINGS

FIG. 1 is a prior art flowchart showing an assembly process of asemiconductor device memory card.

FIG. 2 is a prior art schematic representation of an assembly process ofa semiconductor device memory card.

FIG. 3 is a prior art illustration of a semiconductor device includingan MES marking.

FIG. 4 is a flowchart of an embodiment of the present technology forprocessing a substrate strip.

FIG. 5 is a flowchart of an embodiment of the present technology forprocessing a semiconductor wafer piece.

FIG. 6 is a flowchart of an embodiment of the present technology forforming a semiconductor device.

FIG. 7 is an illustration of a substrate including a marking accordingto an embodiment of the present technology.

FIG. 8 is an illustration of a KGD map used in embodiments of thepresent technology.

FIG. 9 is an illustration of a semiconductor device including a uniqueidentifier.

FIG. 10 is a table including information on a semiconductor device andits discrete components according to an embodiment of the presenttechnology.

FIG. 11 is a flowchart of an embodiment of the present technology fortesting a semiconductor device.

FIG. 12 is a table including information on a semiconductor device andits processes according to an embodiment of the present technology.

FIG. 13 is a block diagram of a sample server for implementing aspectsof the present technology.

DETAILED DESCRIPTION

Embodiments will now be described with reference to FIGS. 4 through 13,which relate to a system enabling backward traceability of asemiconductor device fabrication process to a single semiconductor dieor other discrete component, and forward traceability of individualdevices and components through memory and card tests. It is understoodthat the present technology may be embodied in many different forms andshould not be construed as being limited to the embodiments set forthherein. Rather, these embodiments are provided so that this disclosurewill be thorough and complete and will fully convey the invention tothose skilled in the art. Indeed, the present system is intended tocover alternatives, modifications and equivalents of these embodiments,which are included within the scope and spirit of the present system asdefined by the appended claims.

In general, the present technology provides backward and forwardtraceability by a methodology which uniquely identifies eachsemiconductor device, and which provides an association between theuniquely identified semiconductor device and the discrete components(die, substrate and/or passives) that are used in that device. Theunique identification and marking of a semiconductor device enables thesemiconductor device, and the discrete components within that device, tobe tracked and traced through each process and test in the production ofa memory card from that device.

The information relating to a semiconductor device, including its uniqueID and the specific component identifiers, are stored in a database,referred to herein as an MES database. In the description below, the MESdatabase stores backward and forward traceability data in addition toother MES data. However, it is understood that storage of data relatingto card fabrication may be distributed across more than one database ina variety of ways. In one such example shown in the block diagram ofFIG. 13, there are two databases: a traceability database 306 a forstoring all backward and forward traceability data, generated asexplained below, and a separate MES database 306 b for storing otherMES-related data. As indicated, the description that follows generallyrefers to a single MES database which stores backward and forwardtraceability data as well as other MES data.

An embodiment of the present technology will now be described withreference to the flowcharts of FIGS. 4 through 6. In embodiments,information regarding discrete components (substrates, semiconductor dieand/or passive components) may be stored in the MES database prior totheir assembly into a semiconductor device. As explained below, when thediscrete components get assembled into a semiconductor device, thisinformation for the discrete components may be associated in the MESdatabase with the device. However, as a precursor to this association,information regarding the discrete components may be identified andstored.

The fabrication process may begin by defining a work order forproduction of a given number and type of memory card. This may occur forexample days or weeks before the actual fabrication begins. Each memorycard is made from a particular type of substrate, memory die, controllerdie and other discrete components. When a work order is defined, thediscrete components that will be used for the work order are alsospecified and stored in the MES database. When discrete components suchas substrate lots and wafer lots are received in the fabrication plant,they are labeled with information such as the component manufacturer,date and place of manufacture and a lot number assigned to thatcomponent lot. This information is scanned upon receipt (or at somepoint prior to use in a work order) and uploaded to the MES database.Thus, when a work order is defined, the specific lot numbers of thediscrete components that will be used for that work order are alsospecified.

When a work order is to begin, a substrate lot is scanned in a step 100to verify it is a proper substrate lot for that work order. Theindividual substrate strips from that substrate lot may then beprocessed. It is understood that a variety of different substrates maybe used with the present technology, including for example a PCB, aleadframe and/or a TAB tape. The example of FIG. 7 shows a strip 200 ofleadframe substrates 204 (one of which is marked in FIG. 7). Althoughany of a wide variety of substrates may be used, the strip 200 shown inFIG. 7 may for example be for MicroSD memory cards having eightysubstrates 204 in a 4×20 array. The strip 200 shown is by way of exampleonly and strip 200 may come in other shapes, sizes and configurations.While a strip of substrates is described hereinafter, it is understoodthat the individual substrates may be other substrates and mayalternatively be formed of a panel, roll or other grouping ofsubstrates.

In step 102, each strip 200 (or other grouping of substrates 204) may belaser marked with its substrate lot number and a specific ID unique tothat strip 200. In embodiments, the MES system includes a controlprogram which receives data and feedback from various tools andcomponents within the card fabrication plant and stores the informationin the MES database. Two components providing data and feedback to theMES control program are laser mark stations 318 (FIG. 13) and scanners320.

In step 102, the laser mark station 318 associated with substrateprocessing may generate and assign each substrate strip 200 a unique ID.As one example, the laser mark station may assign successive stripidentifiers as successive substrate strips 200 are processed. The lasermark station 318 then laser marks each substrate with the knownsubstrate lot number and the substrate strip ID that it generated. It isunderstood that the unique strip identifier for each substrate strip 200may be generated by another component within the MES system. Thecomponent may then communicate the unique substrate strip ID to thelaser mark station, which marks each substrate strip 200 with thesubstrate lot and substrate strip identifier.

Each instance of a substrate strip 200 may include a laser marking 202including a substrate lot number (generic to all strips in thatsubstrate lot) and a substrate strip identifier that is unique to thatspecific strip. The substrate lot number and unique strip identifier areshown in FIG. 7 as a pair of two digit alphanumeric characters. It isunderstood that the substrate lot number and/or the unique stripidentifier may be represented with more digits, or in different ways,than is shown in FIG. 7 in further embodiments.

In a non-limiting example, each digit of a two digit alphanumericidentifier (of the substrate lot number and/or the unique stripidentifier) may have 33 possible values. The 33 possible values comefrom 10 numeric values (0-9) and 23 letters of the alphabet (A-Z, minusthe letters B, O and I, as these may be confused with 8, 0 and 1,respectively). Thus, a digit may be any of 33 possible characters foreach digit. A two digit number may thus represent 33×33=1089 possibleunique identifications for a substrate sublot, and 1089 possible uniquestrip identifiers for each substrate sublot. It is understood that a twodigit number may be comprised of digits having more than or less than 33possible values in further embodiments.

The laser marking 202 may further include a machine-readable code havingthe substrate lot number and unique strip identifier information in aform that is readable by a computer scanner. The machine-readable codeshown in FIG. 7 is a two-dimensional matrix code, but it is understoodthat the computer readable code may be a one-dimensional bar code or anyother marking in which the substrate lot number and unique stripidentifier may be encoded in such a way so as to be understood by acomputing device. In embodiments, it is conceivable that a computer canread alphanumeric text. In such embodiments, the separate matrix orother code in addition to the text may be omitted.

The markings of step 102 may be made by laser or other known printingoperation. Instead of marking, adhesive labels including theabove-described information may be affixed to each substrate strip 200.FIG. 7 shows the laser marking 202 in the upper left hand corner ofsubstrate strip 200. It is understood that the laser marking 202 may beprovided at other locations on substrate strip 200 in furtherembodiments.

In step 104, the laser mark station 318 which generated the unique stripID may upload the unique ID assigned to each substrate strip to the MESdatabase. With the known substrate lot number and the received uniquestrip ID, a separate record may be created in the MES database for eachsubstrate strip 200. Each record may include the substrate lot,substrate lot history, unique strip ID and a unique substrate ID of eachsubstrate on a strip 200. As noted above, when a substrate lot firstenters the card fabrication plant, an ID for that lot, as well as ahistory for that lot, may be scanned and uploaded to the MES database.Substrate lot history may include information such as who made thesubstrate lot, and when and where it was made. Historical informationmay include other information in further embodiments. The substrate lotID and history may be uploaded to the MES database at a time other thanwhen received within the card fabrication plant, such as for examplewhen a substrate lot is selected for use.

As noted, in addition to storing a strip ID for each substrate strip200, the step 104 further includes storing a unique ID for each instanceof a substrate 204 on the strip 200. As the type of substrate used in awork order is known, the control program or other aspect of the MESsystem may generate unique IDs for each substrate 204 on a strip 200using some pre-defined convention of identifying individual substratesbased on their position on a substrate strip 200.

For example, with respect to the 80 substrates 204 shown on the strip200 of FIG. 7, the MES control program may adopt a convention where therows are assigned a letter A-D starting from the bottom and the columnsare assigned a number 1-20 starting from the left. Thus, the substratein row 2, column 4 may be identified as B-4. As an alternative, aconvention may be defined which numbers each position consecutively, forexample the first row from the bottom are number 1 through 20, thesecond row from the bottom are numbered 21-40, etc. It is understoodthat each substrate may be assigned a unique identifier by otherconventions in further embodiments. Moreover, as indicated, differentsubstrate strips may have different shapes and numbers of substrates infurther examples.

In step 106, the substrate strip 200 may be processed prior toconnection of the passive components, including for example solderapplication, cleaning and inspection. In step 108, any such processsteps may be stored by the MES control program in the MES database inassociation with the substrate strip 200 and/or specific substrates 204.Additional information relating to the processes may also be stored inassociation with the strip 200 and/or specific substrate 204, includingfor example when and where the processes were performed, the specifictool that was used, a maintenance record for that tool and/or fabpersonnel associated with the process.

At the same time or at a different time, analogous identification,storing and processing of wafer pieces to be used in production of thesemiconductor devices may also be performed. As explained in theBackground section, a separate wafer lot may be used for each die in thedie stack to be affixed to the semiconductor device. In step 110, eachwafer piece in each wafer lot may be identified. In embodiments, aunique ID may be marked on each wafer piece, either by the wafermanufacturer or within the card fabrication plant, for example using amarking process as described above with respect to the substrate strips.In a further embodiment, instead of marking each wafer piece, a waferpiece may be uniquely identified by its vertical position relative toother wafer pieces within a wafer sublot (e.g., the ninth wafer piecefrom the top of the sublot).

In step 112, a record may be created in the MES database for each die ona wafer, including the wafer sublot, wafer lot history, wafer piece IDfor each wafer piece in the sublot and a die ID for each die on a waferpiece. This occurs for each wafer sublot used in a device fabricationprocess, including the one or more memory die wafer sublots/mother lotand the controller die wafer lot. In embodiments, as indicated above,when a wafer lot first enters the card fabrication plant, an MES waferlot ID for that lot, as well as a history for that lot, may be scannedand uploaded to the MES database. Wafer lot history may includeinformation such as who made the wafer lot, and when and where it wasmade. Historical information may include other information in furtherembodiments. The MES wafer lot ID and history may be uploaded to the MESdatabase at a time other than when received within the card fabricationplant, such as for example when a wafer sublot is selected for use.

The step 112 further includes storing a wafer piece ID and die ID. Asdescribed in step 110, the MES control program identifies each waferpiece, either with a unique ID or by its position within an identifiedwafer sublot. The MES control program may also store the wafer pieceidentifier at the time it is generated. As for the identification ofspecific die on a wafer piece, the MES control program may store theseusing a pre-defined convention of describing the positions of all die ona wafer piece in terms of (x, y) coordinates. Spherical coordinates (r,□) may alternatively be used to define the positions of die on a waferpiece. Other methods of identifying specific die on a wafer piece arecontemplated, including by position on the wafer piece or a unique IDassigned to each die on a wafer piece.

In step 114, a wafer piece may be processed, including for examplebackgrind, dicing, inspection and cleaning. In step 116, any suchprocess steps may be stored by the MES control program in the MESdatabase in association with the wafer piece and/or die on the waferpiece. Additional information relating to the processes may also bestored in association with the wafer piece and/or die on the waferpiece, including for example when and where the processes wereperformed, the specific tool or tools that were used, a maintenancerecord for the tool(s) and/or fab personnel associated with theprocesses.

The embodiments described above with respect to FIGS. 4 and 5 enablemaximum resolution as to backward traceability of the discretecomponents used within a semiconductor device, as explained below. Infurther embodiments, where maximum resolution is not required, one ormore of the discrete component identification and storage stepsdescribed above may be omitted. Moreover, at least some of the stepsdescribed above with respect to FIGS. 4 and 5 may be performed later inthe fabrication process, such as for example when the discretecomponents are assembled together into a semiconductor device, as willnow be described with respect to the flowchart of FIG. 6.

In step 120, the next substrate 204 to receive passives and die on astrip 200 is selected. If not already done, the substrate lot number,strip ID and position of this substrate 204 are stored in the MESdatabase by the MES control program. In step 122, a unique identifierfor each passive component to be mounted on the selected substrate 204may be stored in the MES database in association with the selectedsubstrate 204. The passives, including for example resistors and/orcapacitors, may have their own unique identifier, which gets scanned orotherwise entered by fab personnel into the MES database in associationwith the substrate 204 on which they are to be mounted. The passivecomponents may then be surface mounted on the selected substrate 204 andreflowed in step 124.

In step 126, die are selected for mounting on the substrate 204 based ona KGD map. A representation of a KGD map is shown in FIG. 8 for a singlewafer piece from an MES wafer sublot. As noted, semiconductor devicesmay include different numbers of semiconductor die, and there may be aseparate wafer sublot used for each die to be mounted in a die stack onthe substrate 204. Thus, where there are for example 2, 4 or 8 memorydie to be mounted on the substrate 204, there may be 2, 4 or 8 MES wafersublots, respectively, feeding die to the substrate. There may be a KGDmap of each wafer piece in each MES wafer sublot, which KGD maps areprovided by the wafer piece manufacturer based on testing done at themanufacturer.

FIG. 8 shows an example of a wafer piece 206 having a plurality ofsemiconductor die 208 (one of which is numbered in FIG. 8). The goodnessof a die may be represented in the KGD map by alphanumeric codesassociated with each die 208 on wafer piece 206. In this example, 0,0may represent a die with no detected flaws; A,A may be a good die withminimal flaws; and 1,1 may represent a bad die which should not beselected for mounting on any of the substrates 204. It is understoodthat any of a variety of other schemes may be used by a KGD map torepresent the goodness of a die on a particular wafer piece 204.

The die selected in step 126 from wafer pieces in different MES waferlots may be selected based on a number of different criteria. In oneembodiment, flawless die (0,0) from wafer pieces in the respective MESwafer sublots may be first selected and attached together on substrates204. Substrates having only flawless die are likely to result in thehighest quality semiconductor devices. As explained below, one aspect ofthe present technology allows identification and segregation ofsemiconductor devices having the highest quality semiconductor die.These devices may then be shipped to OEM manufacturers or others for apremium. Selection of only flawless die for mounting in a singlesemiconductor device may optimize the chance of that device being of thehighest quality. If the flawless die from one or more wafer pieces inrespective sublots have been exhausted, then the next best die (A,A) maybe used. It is understood that the die selected for attachment within agiven semiconductor device may be selected based on a variety of othercriteria in further embodiments.

In step 128, the MES wafer sublot, wafer piece ID and selected dieposition on the wafer piece may be stored in association with thesubstrate 204 on which the selected die are to be mounted. This may bedone for each die from the different sublots to be mounted on thesubstrate. After all die to be mounted on a given substrate have beenidentified and stored in association with that substrate in step 128,the die may be mounted on the substrate in step 130. The order of steps128 and 130 may be reversed in alternative embodiments. The die may bemounted to the substrate for example via a die attach adhesive in aknown adhesive or eutectic die bond process.

Once the die and/or passives have been mounted on a substrate, thatassembly may be considered a semiconductor device (although furtherprocessing steps are performed before it is a finished package asexplained below). At this point, it is possible to assign eachsemiconductor device a unique device ID. However, as explainedhereinafter, assignment of a unique device ID may alternatively beperformed later in the process, for example in relation to the lasermark step 142.

In step 136, semiconductor devices formed on substrates may go through awire bond process for wire bonding die bond pads on each devicesemiconductor die 208 to contact pads formed on the substrate 204. Asnoted in the Background section, this process is relatively timeconsuming. As such, an MES assembly lot may be subdivided into MESassembly sublots. The information for each device may be updated in theMES database to reflect the particular assembly sublot and process toolto which each device is transferred.

Following the wire bond step 136, the devices in the respective assemblysublots may be encapsulated in a molding compound in step 138, assigneda unique device ID in step 140, laser marked with an identifier in step142 (steps 140 and 142 are explained in greater detail below),singulated into separate semiconductor devices in step 144 and inspectedin step 148. As discussed in the Background section, the respectivesublots may stay separated for steps 138, 140, 142, 144 and/or 148.Alternatively, at one of these steps, one or some of the assemblysublots may recombine, or all assembly sublots may recombine into theoriginal assembly lot.

The step 140 of assigning a unique device ID to each device, and thestep 142 of laser marking that unique device ID on a device may both beperformed by a laser marking station 318 associated with device marking.FIG. 9 shows a top view semiconductor device 210 after encapsulation,singulation and laser mark. The laser mark may include a logo 212 and analphanumeric representation 214 of the unique ID associated with thedevice. The logo 212 may be omitted in embodiments. The device unique IDrepresentation 214 may have the format of:

-   -   YWWDMLLXXX, where:    -   Y represents the year's last digit;    -   WW represents the week # within the year;    -   D represents the day within the week (1 to 7);    -   LL represents an alphanumeric 2-digit ID to designate each MES        assembly sublot; and    -   XXX represents an alphanumeric 3-digit unique ID to distinguish        each device made with the same date, location and MES assembly        sublot information.

The first seven digits in the unique ID representation 214 are known bythe MES system for each device. The last three digits may be generatedand assigned for example by the laser marking station as it marks eachdevice. As one example, the laser mark station may assign successivedevice identifiers as successive devices 210 are processed. The uniqueten digit ID may then be stored by the MES control program in the MESdatabase as a means of uniquely identifying the specific device 210 inthe database. Instead of the last three digits being generated by thelaser mark station, it is understood that the unique device identifierfor each device 210 may be generated by another component within the MESsystem. The component may then communicate the unique device ID to thelaser mark station, which marks each device 210 with the ten digitdevice identifier.

There may be greater or fewer than three digits at the end of the uniqueID representation 214, depending on how many digits are required touniquely identify each device for that date, location and MES assemblysublot. In a non-limiting example, any of the digits, such as forexample the sublot number LL and the assigned digits XXX, may have 33possible values as described above (10 numeric values and 23 letters ofthe alphabet (A-Z, minus the letters B, O and I)). Thus, for example thesublot number LL may uniquely identify any of 1089 sublots, and theassigned three digit code may uniquely identify any of almost 36,000devices within a given sublot. It is understood that a given digit mayrepresent more or less values in further embodiments. It is furtherunderstood that additional or alternative information may be includedwithin the unique ID representation 214 in further embodiments, with theprovision that the representation uniquely identify the semiconductordevice 210 bearing the representation. For example, it will beappreciated that the date information may be represented in differentways in the representation 214.

The marking further includes a code 218 having the same information asthe alphanumeric representation 214, but in machine-readable form. Themachine-readable code 218 may be a two-dimensional matrix code, but itis understood that the computer readable code may be a one-dimensionalbar code or any other marking in which the unique device ID may beencoded in such a way so as to be understood by a computing device. Inembodiments where a computer can read alphanumeric text, the separatematrix or other code in addition to the text may be omitted.

The logo 212, representation 214 and/or code 218 may be made by laser orother known printing operation. Instead of marking, adhesive labelsincluding the above-described information may be affixed to eachsemiconductor device 210. The locations of the logo 212, representation214 and code 218 shown in FIG. 10 are by way of example only, and thelocation of each may be moved to different locations. One or more of thelogo 212, representation 214 and code 218 may be placed on a backsurface of the semiconductor device 210 in further embodiments.

While the provision of both the alphanumeric representation 214 and code218 on a surface of the device 210 is helpful, it is understood that oneor the other of these may be omitted in further embodiments. As notedabove, the code 218 may be omitted where a computing device is able toread and comprehend the alphanumeric representation. Alternatively,though more time consuming, the code 218 may be omitted and fabpersonnel can input the alphanumeric representation via a keyboard orother input device associated with the MES control program. Similarly,while it is useful to allow people to read the alphanumericrepresentation 214, it may be omitted, in which event, people mayidentify the unique ID once the code 218 is scanned.

After a three digit code XXX is assigned to a device by a laser markstation, the laser mark station may then upload the three digit code sothat the MES system then has a unique ten digit identifier for eachdevice. The unique ten digit identifier may then be stored in the MESdatabase to allow unique identification of each specific device in theprocess.

Referring now to FIG. 10, the MES database may have a table 220 with allof the data it needs for backward traceability of all relevantinformation relating to all processed devices. This information mayinclude for example the specific discrete components (as opposed to awafer lot, substrate lot or passive component lot) that are included ineach device. As shown in FIG. 10, the MES database may store the uniqueID for a device, together with the following information associated withthat unique device ID:

-   -   the MES assembly sublot to which the device belongs;    -   the substrate lot number, strip ID and position on the        identified strip;    -   the MES wafer sublot number, wafer piece ID and die position on        the wafer piece for the first die;    -   the MES wafer sublot number, wafer piece ID and die position on        the wafer piece for the second die; . . .    -   the MES wafer sublot number, wafer piece ID and die position on        the wafer piece for the die n (in an n-die stack).        In the embodiment of FIG. 10, specific information relating to        the passive components is not shown in the table 220, but this        information may be included in further embodiments.

With the association of a specific discrete component (die, substrateand/or passive) with a specific unique device ID, all of theabove-described stored information regarding the discrete components maybe associated with a specific semiconductor device by its unique deviceID. As noted above, a wealth of information is generated and storedrelating to discrete components prior to the time they are assembledinto a semiconductor device. Once a unique device ID is generated for asemiconductor device, all of the stored information for the discretecomponents in that device may be associated in the MES database withthat unique device ID. Thus, for example, using a device's unique ID,the following information may be quickly and easily accessed from theMES database:

For the semiconductor die (memory and controller) used in the device:

-   -   Manufacturer;    -   When and where manufactured;    -   When received at device fabrication plant;    -   When and where backgrind, dicing and other processing steps        performed (while still part of a wafer piece or thereafter) and        by whom;    -   Where on the wafer the die was located (as described above).

For the substrate used in the device:

-   -   Manufacturer;    -   When and where manufactured;    -   When received at device fabrication plant;    -   When and where surface mounting and other processing steps        performed (while still part of a strip or thereafter) and by        whom;    -   Where on the strip the substrate was located (as described        above).

For passives used in the device:

-   -   Manufacturer;    -   When and where manufactured;    -   When received at device fabrication plant;    -   When and where surface mounted and other processing steps        performed and by whom.

The above information regarding the discrete components may be storedalong with the information shown in FIG. 10, or it may becross-referenced in the MES database with the information shown in FIG.10. With the above information, the MES database can provide completebackward traceability with respect to all of the discrete componentswithin a given semiconductor device. This information may be accessed byknowing a device's unique ID, which is printed right on the device asexplained above (both in human-readable and machine-readable formats).The information shown in FIG. 10 and described above is not intended asan exhaustive listing of the information which may be stored in the MESdatabase regarding a semiconductor device and its discrete components.Additional and/or alternative information may also be stored in furtherembodiments in association with a unique device ID.

In addition to backward traceability, uniquely identifying each device210 also enables forward traceability. Each process tool (or personnelassociated with each such process tool) may have a scanner 320 incommunication with the MES control program. The scanner at a given toolscans the matrix code 218 of a device 210, and the MES control programupdates the MES database to indicate that the device 210 is undergoingthe process or test at that tool. The scanner may scan one device 210 ata time, or the scanner could potentially scan the code 218 of a numberof devices 210 at one time.

Upon scanning of a device at a given process tool (fabrication or test),the MES control program may record the process step, as well asinformation about the process step, in association with the device'sunique ID number. This recorded information may include for example adate and time the device underwent a process, personnel associated withthe tool performing the process, a maintenance record of the processtool, and a wide variety of other information. Thus, the unique deviceID, together with the scanning of that ID for all processes the deviceundergoes, provides complete forward traceability of the device 210 asit moves through the fabrication and testing processes.

Referring now to FIG. 11, after singulation and marking of devices 210,the devices 210 may undergo memory testing and card testing. For memorytesting, several assembly sublots can be combined to a larger test lotin an N to 1 consolidation for efficient testing and equipmentutilization. As one example, 25 assembly sublots may be combined into asingle test lot, though it can be more or less assembly sublots infurther examples. In step 150, a consolidated test lot may undergo amemory test. The memory test may include multiple read/write operationsto each device 210 in the test lot, possibly at hot and coldtemperatures. The memory test in step 150 may include other oralternative tests, such as for example burn-in.

As explained in the Background section, the memory test 150 results in abinning of the semiconductor devices in the test lot, where the devicesare physically separated into different bins. In one example, there maybe 7 bins, where devices in bins 1-4 are deemed to have satisfactorilypassed the test operation(s), and devices in bins 5-7 have not. Theembodiment of 7 bins, with bins 1-4 passing and bins 5-7 requiringretest, is by way of example only. A variety of other binning andclassifications may be used where devices which satisfactorily performthe memory test are distinguished from those that do not.

In step 156, if any device winds up in bins 5-7, the device ID isscanned in step 158, and the record for that device in the MES databaseis moved to a different logical partition (still within the MESdatabase, but within a different set of stored records). Thus, the steps156, 158 and 160 of identifying bad devices and moving the records forthe bad devices to a new location, results in two different overallclassifications of devices. Database records for devices which pass thememory test remain unchanged in the database. These devices, referred toherein as a prime test sublot, are transported to the card test asdescribed below.

On the other hand, records for devices which wind up in bins 5, 6 and 7are scanned to record their bin, and records for those devices moved toa new database locations. Other information may also be stored with therecords in the new locations, including for example date and time, testpersonnel, etc. Records for individual devices may be identified bytheir unique ID number as explained above. With the separation intodifferent database locations, it may be readily apparent which devicesperformed well in the memory testing steps and which devices did not.

In step 162, those devices ending up in bins 5-7 may go through reclaim,where they are retested in step 150. As indicated in the Backgroundsection, the type of retest may depend on which bin a device wasclassified into. After retest, the devices are again binned, and baddevices scanned. Database records for these devices that fail binning asecond time may again be moved to a new database location. By thissystem, the MES database will have an express record of how a givendevice performed in testing step 150. Where a device fails multipletimes, each instance and resulting binning will be stored in associationwith that device. The present system allows the MES control program toprovide a variety of real-time data. In one aspect, the MES controlprogram may indicate when a device has failed the testing step 150 apredetermined number of times, in which event that device may be removedfrom further testing.

In the system of steps 150 through 162, only those devices that failedtesting are scanned. This provides advantages in that the devices whichpass, which would typically be a very large number of devices, do notneed to be scanned. However, in further embodiments, all devices may bescanned after test, and the information regarding their binning may alsobe added to the database. In embodiments, instead of removing bad devicerecords, all records may be left within their original location in thedatabase, but their record is updated to reflect the test result. Hereagain, only bad devices may be scanned and their record updated, or alldevices may be scanned and their record updated.

For devices 210 which pass the testing step 150 (bins 1-4), the devicesmay be combined into a card test lot for a card test in step 166. Thecard testing steps may be similar to the memory testing steps, butadditional or different tests are run, such as for example seeing howthe devices 210 handle downloaded content. The devices 210 are subjectedto a card test in step 166 and the devices are binned depending on howthey perform in step 168. This binning may be by the same or differentprocedure than in the memory test step. Bad devices may be scanned instep 170, and their records moved to a new database location togetherwith the binning information in step 174. These devices may be reclaimedin step 178, and the process repeated. Each time a device 210 goesthrough reclaim, its record, together with the reclaim information, maybe moved to a new location upon failure.

Those devices 210 which pass the card test, may go through finallabeling or handling in step 176 at which point the devices 210 arefinished semiconductor packages ready for shipment. One aspect of thepresent technology allows identification of the best devices. That is,given the tracking of each device and storage of information about thedevice, the MES control program can identify devices which for examplehave only flawless semiconductor die (0,0 on the KGD map) and/or thosewhich passed the memory test and card test without any reclaim. Thesedevices may be segregated in step 180 for sale to customers requiringhigher performance. The remaining good quality devices may be soldelsewhere. Similarly, devices which passed the memory and/or card testsafter several reclaims may be segregated, for example to be sold at alower price. Segregation step 180 may be omitted in further embodiments.

FIG. 12 shows the table 220 further including records for all processtools a semiconductor device went through, and all testing proceduresthe semiconductor device went through. (The table 220 may also includeall of the discrete component information shown in the table 220 of FIG.9, which is omitted from FIG. 12 for clarity). The table 220 may furtherhave records for each reclaim process a semiconductor device wentthrough during a test operation. As above, the table 220 of FIG. 12 isshown by way of example only, and may include additional or differentinformation in further embodiments.

The present system provides complete backward and forward traceabilityof a semiconductor device and its discrete components as thesemiconductor device travels through the fabrication process, and thepresent system provides this traceability in real-time. Such a systemprovides better resolution than was possible with conventional trackingand traceability systems. As discussed in the Background section,conventional traceability systems did not have a unique ID associatedwith each device, and did not have the ability to trace back and trackthe specific discrete components (die, substrate and/or passives) usedin a device. As one consequence, when a problem with a device wasdetected after fabrication, conventional systems had limited ability tofind the problem. Prior art systems allowed identification of MESassembly lots, from which it could be determined what processes a givendevice went through. From this, further research could reveal a waferlot, and possibly reveal where a problem occurred. However, suchresearch was time consuming and did not provide any specificidentification or information on the discrete components from which thesemiconductor device was formed.

These problems are solved in the present system. Where a problem with adevice is detected, a query to the MES database can instantly reveal allprocesses the device went through, as well as an identification, processsteps and information relating to the specific die, substrate and/orpassives used. Not only does this enable identification of the source ofa problem more easily, but it can quickly reveal problem trends.Analysis of a small number of problem devices may quickly and easilyidentify a common factor between them, whether at the device level orthe discrete component level. For example, it may happen that a samplingof problem devices reveals that each problem device was made usingsemiconductor die from a particular wafer sublot or lots coming from aparticular wafer manufacturer. The ability to pinpoint the source of aproblem, even when occurring at the discrete component level, provides amarked advance over conventional MES platforms.

Moreover, as traceability is possible in real-time, the source of aproblem may be identified and remedied as soon as the problem is found,without wasting additional resources. For example, if a problem in asampling of semiconductor devices during memory or card testingidentifies a particular wafer lot or lots as the problem, thefabrication run may be stopped, and the problematic lot or lots removedfrom the process before further die from these wafers are incorporatedinto devices.

While the present system has been described in relation to anon-volatile memory package such as a memory card, it is understood thatthe methodology described herein may be used for complete backward andforward traceability in other semiconductor package technologies.

The MES control program and MES database may be part of an MES server300, one example of which is now described with reference to FIG. 13.Components of MES server 300 may include, but are not limited to, aprocessor 302, a system memory 304, traceability database 306 a, MESdatabase 306 b, various system interfaces and a system bus 308 thatcouples various system components. As noted above, the traceabilitydatabase 306 a and MES database 306 b may be combined into a singledatabase or distributed across multiple databases. The system bus 308may be any of several types of bus structures including a memory bus ormemory controller, a peripheral bus, and a local bus using any of avariety of bus architectures.

The system memory 304 includes computer storage media in the form ofvolatile and/or nonvolatile memory such as ROM 310 and RAM 312. RAM 312may contain an operating system 313 for MES server 300, and the programmodules of the MES software platform 314. One of these program modulesmay be the MES control program mentioned above. The MES control programmay be that portion of the MES platform which directs various componentsof MES server 300 to retrieve data relating to the semiconductor devices210 and the discrete components of the semiconductor devices 210. TheMES control program may further be responsible for generatingidentifiers as described above. The MES control program may have furtherresponsibilities.

The traceability database 306 a and the MES database 306 b may each forexample be a relational database including computer-readable media whichtogether store all MES data including data relating to the semiconductordevices 210 and the discrete components of the semiconductor devices 210discussed above. The databases 306 a and/or 306 b may store other typesof data and information as well. Although shown as being part of MESserver 300, the traceability database 306 a and/or the MES database 306b may be remote from server 300, and may even be remote from the cardfabrication plant in which the MES server may be located. There may beredundant and backup versions of one or both of the traceabilitydatabase 306 a and the MES database 306 b in embodiments. Although notshown, the MES server 300 may also include a variety of othercomputer-readable media, including removable/non-removable,volatile/nonvolatile computer storage media.

The MES server 300 may include a variety of interfaces for the input andoutput of data and information. Input interface 316 receives data from aplurality of scanners 320 and input devices such as a keyboard 322 andmouse 324. The scanners 320 may be provided at process and test toolsfor reading the machine readable codes discussed above, such as thematrix code 218 on the semiconductor device 210. The scanners 320 mayalso read the machine readable codes on the discrete components. Thenumber of scanners shown in FIG. 13 is by way of example only.

A video interface 330 may be provided for interfacing with a monitor332. Monitor 332 may for example be used to provide a graphical userinterface for fab personnel, and to display data from the variousprocess and testing tools, as well as other plant operations. Aperipheral interface 336 may be provided for supporting peripheraldevices, including for example a printer 338.

The MES server 300 may operate in a networked environment via a networkinterface 340 using logical connections to one or more remote computers344, 346. The logical connection to computer 344 may be a local areaconnection (LAN) 348, and the logical connection to computer 346 may bevia the Internet 350. Other types of networked connections are possible.Thus, in addition to interfacing with the databases 306 a and/or 306 bto obtain traceability information within the card fabrication plant,the present system allows connection to the MES server 300 to obtainthis information from any remote location having a network connection tothe MES server.

It is understood that the above description of MES server 300 is by wayof example only, and may include a wide variety of other components inaddition to or instead of those described above.

In summary, one embodiment of the present technology relates to a systemfor tracking semiconductor packages. The system includes a semiconductordevice having a substrate and one or more semiconductor die mounted onthe substrate. The system further includes an identifier associated withthe semiconductor device, the identifier uniquely distinguishing thesemiconductor device from all other semiconductor devices.

In another embodiment, the present technology relates to a system fortracking semiconductor packages. The system includes a semiconductordevice having a substrate and one or more semiconductor die mounted onthe substrate. The system further includes an identifier associated withthe semiconductor device, the identifier associating the specificsemiconductor die used in the semiconductor device with thesemiconductor device.

In a further embodiment, the present technology relates to a system fortracking semiconductor packages. The system includes a semiconductordevice having a substrate and one or more semiconductor die mounted onthe substrate. The system further includes an identifier associated withthe semiconductor device, the identifier also associating with thesemiconductor device: i) fabrication processes performed on thesemiconductor device, ii) testing operations performed on thesemiconductor device, and iii) how the semiconductor device performed inthe testing operations.

In another embodiment, the present technology relates to a system fortracking semiconductor packages. The system includes a semiconductordevice having a substrate, one or more semiconductor die mounted on thesubstrate, and passive components. The system further includes acomputer-readable medium including stored information identifying atleast one of: i) the substrate used in the semiconductor device, ii) theone or more semiconductor die used in the semiconductor device, iii) thepassive components used in the semiconductor device, iv) tools at whichthe semiconductor was processed, v) tools at which the semiconductordevice was tested, vi) binning of the semiconductor device after testingof the semiconductor device, and vii) whether and how many times thesemiconductor device underwent a reclaim operation after a testingoperation.

The foregoing detailed description of the invention has been presentedfor purposes of illustration and description. It is not intended to beexhaustive or to limit the invention to the precise form disclosed. Manymodifications and variations are possible in light of the aboveteaching. The described embodiments were chosen in order to best explainthe principles of the invention and its practical application to therebyenable others skilled in the art to best utilize the invention invarious embodiments and with various modifications as are suited to theparticular use contemplated. It is intended that the scope of theinvention be defined by the claims appended hereto.

1. A system for tracking semiconductor packages, comprising: asemiconductor device, the device including: a substrate, and one or moresemiconductor die mounted on the substrate; and an identifier associatedwith the semiconductor device, the identifier uniquely distinguishingthe semiconductor device from all other semiconductor devices.
 2. Thesystem of claim 1, wherein the unique identifier is provided on asurface of the semiconductor device.
 3. The system of claim 2, whereinthe unique identifier is an alphanumeric code provided on the surface ofthe semiconductor device.
 4. The system of claim 2, wherein the uniqueidentifier is a machine-readable code provided on the surface of thesemiconductor device.
 5. The system of claim 1, wherein the uniqueidentifier is stored in the memory of a computing device for monitoringa fabrication process for the semiconductor package.
 6. The system ofclaim 1, wherein the unique identifier identifies the one or moresemiconductor die used in the semiconductor device.
 7. The system ofclaim 1, wherein the unique identifier identifies at least one of amanufacturer of the semiconductor die used in the semiconductor device,a time and place the semiconductor die were made and processes performedon the semiconductor die before incorporation into the semiconductordevice.
 8. The system of claim 1, wherein the unique identifieridentifies the substrate used in the semiconductor device.
 9. The systemof claim 1, wherein the unique identifier identifies at least one of amanufacturer of the substrate used in the semiconductor device, a timeand place the substrate was made and processes performed on thesubstrate before incorporation into the semiconductor package.
 10. Thesystem of claim 1, wherein the unique identifier includes: a time andplace the semiconductor device was made, a device assembly sublot fromwhich the semiconductor device came, and an ID distinguishing eachdevice made with the same time and place information and same deviceassembly sublot information.
 11. The system of claim 1, wherein theunique identifier has the format of YWWDMLLXXX, where: Y represents theyear's last digit; WW represents the week number within the year; Drepresents the day within the week; M represents the semiconductorpackage fabrication plant; LL represents an alphanumeric 2-digit ID todesignate each device assembly sublot; and XXX represents analphanumeric 3-digit unique ID to distinguish each device made with thesame date, location and device assembly sublot information.
 12. Thesystem of claim 1, wherein the semiconductor package is a non-volatilememory package.
 13. A system for tracking semiconductor packages,comprising: a semiconductor device, the device including: a substrate,and one or more semiconductor die mounted on the substrate; and anidentifier associated with the semiconductor device, the identifierassociating the specific semiconductor die used in the semiconductordevice with the semiconductor device.
 14. The system of claim 13, theidentifier further associating the specific substrate used in thesemiconductor device with the semiconductor device.
 15. The system ofclaim 13, the semiconductor device further including a passivecomponent, the identifier further associating the specific passivecomponent used in the semiconductor device with the semiconductordevice.
 16. The system of claim 13, wherein the identifier furtherassociates with the semiconductor device at least one of a manufacturerof the semiconductor die used in the semiconductor device, a time andplace the semiconductor die were made and processes performed on thesemiconductor die before incorporation into the semiconductor device.17. The system of claim 13, wherein the identifier further associateswith the semiconductor device at least one of a manufacturer of thesubstrate used in the semiconductor device, a time and place thesubstrate was made and processes performed on the substrate beforeincorporation into the semiconductor device.
 18. The system of claim 13,wherein the one or more semiconductor die include a memory die, theidentifier associating with the semiconductor device the specific memorydie used, and at least one of a manufacturer of the memory die, when theone or more memory die were made and where the one or more memory diewere made.
 19. The system of claim 13, wherein the one or moresemiconductor die include a controller die, the identifier associatingwith the semiconductor device the specific controller die used, and atleast one of a manufacturer of the controller die, when the controllerdie was made and where the controller die was made.
 20. The system ofclaim 13, wherein the identifier is unique to the semiconductor device.21. The system of claim 13, wherein the identifier is displayed on asurface of the semiconductor device and stored in a computer memoryassociated with the system.
 22. A system for tracking semiconductorpackages, comprising: a semiconductor device, the device including: asubstrate, and one or more semiconductor die mounted on the substrate;and an identifier associated with the semiconductor device, theidentifier also associating with the semiconductor device: i)fabrication processes performed on the semiconductor device, ii) testingoperations performed on the semiconductor device, and iii) how thesemiconductor device performed in the testing operations.
 23. The systemof claim 22, the identifier associating with the semiconductor device abin into which the semiconductor device was classified.
 24. The systemof claim 22, the identifier associating with the semiconductor devicewhether the semiconductor device underwent any reclaim operations and,if so, the number of reclaim operations and what the reclaim operationswere.
 25. The system of claim 22, the identifier associating with thesemiconductor device at least one of an identification of a tool used toprocess or test the semiconductor device, a maintenance history of thetool and fab personnel associated with that tool.
 26. The system ofclaim 22, wherein the identifier enables classification of thesemiconductor device, the classification used to identify and segregatea first group of semiconductor devices that performed better than asecond group of semiconductor devices.
 27. The system of claim 22,wherein the identifier is provided in a machine-readable code on asurface of the semiconductor device.
 28. The system of claim 22, whereinthe identifier is unique to the semiconductor device.
 29. A system fortracking semiconductor packages, comprising: a semiconductor device, thedevice including: a substrate, one or more semiconductor die mounted onthe substrate, and passive components; and a computer-readable mediumincluding stored information identifying at least one of: i) thesubstrate used in the semiconductor device, ii) the one or moresemiconductor die used in the semiconductor device, iii) the passivecomponents used in the semiconductor device, iv) tools at which thesemiconductor device was processed, v) tools at which the semiconductordevice was tested, vi) binning of the semiconductor device after testingof the semiconductor device, and vii) whether and how many times thesemiconductor device underwent a reclaim operation after a testingoperation.
 30. The system of claim 29, wherein the computer-readablemedium is used within a database for a manufacturing execution system.31. The system of claim 30, further comprising a network connectionenabling access of the database within a fabrication plant where thesemiconductor package is fabricated.
 32. The system of claim 30, furthercomprising a network connection enabling access of the database outsideof a fabrication plant where the semiconductor package is fabricated.33. The system of claim 29, wherein the information stored on thecomputer-readable medium enables identification and segregation of afirst group of semiconductor devices that performed better than a secondgroup of semiconductor devices.
 34. The system of claim 29, furthercomprising a plurality of scanners associated with the tools at whichthe semiconductor device is processed, the scanners scanning a uniquecode on the semiconductor device enabling information associated withthe tools to be stored in association with the semiconductor device.